The present invention relates to a semiconductor integrated circuit and, more particularly, to a technique effective to reduce burden applied at the time of solving a conflict in overlapping processes in processes for a plurality of interruption factors.
On Apr. 1, 2006, the one-segment partial reception service “One Seg” of the terrestrial digital broadcasting mainly for mobile terminals and the like started in Japan. In One Seg, broadcasting is performed by using one of segments obtained by dividing the frequency band of 6 MHz per physical channel to 13 segments, in 13 to 62 channels of the terrestrial digital broadcasting, thereby minimizing the information amount. Therefore, even a terminal having relatively low information processing capability such as a mobile terminal can properly receive the broadcasting. The feature of the service is that a terminal can receive sound and data broadcasting simultaneously.
The next-generation One Seg broadcasting called ISDB-Tmm aims for not only high-picture-quality high-sound-quality stream broadcasting but also new service such as video content download service more than One Seg. The ISDB-Tmm is abbreviation of Integrated Service Digital Broadcasting-Terrestrial for mobile multimedia.
In the terrestrial digital television broadcasting for mobile terminals, a transport stream TS conformed to the international standard MPEG-2 of motion picture coding is used. One packet of the transport stream TS conformed to MPEG-2 is configured by bit stream data of 188 bytes.
On the other hand, the patent document 1 discloses an application CPU mounted on a cellular phone and processing an MPEG-2 transport stream (hereinbelow, called MPEG2-TS) output from a digital television tuner that receives digital television broadcasting. An external storage can be coupled to the application CPU, and a DMAC for executing data transfer between the external storage and a control unit on the inside is included in place of the CPU core in the application CPU. The DMAC is abbreviation of Direct Memory Access Controller. The DMAC supplies a DMAC transfer completion interruption to the CPU core on completion of transfer of data of a set data amount. In response to the DMAC transfer completion interruption, the CPU core starts the process of the control unit on the inside.    Patent document 1: Japanese Unexamined Patent Publication No. 2007-201983